• LT1761IS5-SD#TRMPBF,LT1761IS5-SD#TRMPBF,OTOMO
  • LT1761IS5-SD#TRMPBF,LT1761IS5-SD#TRMPBF,OTOMO

LT1761IS5-SD#TRMPBF

LT1761IS5-SD#TRMPBF is a 100 mA, micropower (20 µA IQ), low-noise (20 µVRMS), high-PSRR (70 dB @ 120 Hz) fixed 3.3 V low-dropout linear regulator from Analog Devices, featuring stability with 1 µF ceramic capacitors, reverse-battery protection, and 5-lead SOT-23 packaging — ideal for battery-powered sensors, precision analog/RF circuits, and portable instrumentation demanding ultra-low power and high signal integrity.
  • LT1761IS5-SD#TRMPBF,LT1761IS5-SD#TRMPBF,OTOMO

Description

LT1761IS5-SD#TRMPBF is a micropower, low-noise, high-PSRR, 100 mA low-dropout (LDO) linear regulator designed and manufactured by Analog Devices Inc. (ADI) — originally developed by Linear Technology (acquired by ADI in 2017). It belongs to the ultra-low-quiescent-current LT1761 family, engineered specifically for battery-powered, noise-sensitive, and space-constrained applications, where preserving battery life while delivering clean, stable power to precision analog, RF, or mixed-signal ICs is paramount.
The “IS5” suffix denotes the 5-lead SOT-23 package (2.9 mm × 1.6 mm) — an industry-standard, ultra-compact surface-mount footprint; the “-SD” indicates a fixed 3.3 V output voltage (other variants include -1.5, -1.8, -2.5, -5.0); the “#TRMPBF” signifies tape-and-reel packaging (500 units per reel), Pb-free (“PBF”), RoHS-compliant, and qualified for industrial operation (–40°C to +125°C junction temperature).
âš ī¸ Critical Clarification:
The LT1761 is not a general-purpose LDO. It is a precision micropower regulator optimized for ultra-low IQ and high PSRR across wide bandwidth, with unique features:
  • Ultra-low quiescent current: 20 µA (typ.), < 30 µA (max) — enables multi-year battery life in always-on IoT sensors (e.g., 250 µA average load on a 2,000 mAh coin cell → >3 years runtime);
  • Low output noise: 20 µVRMS (10 Hz–100 kHz) — 2× quieter than many competing 100 mA LDOs (e.g., TPS780: 30 µVRMS), critical for powering high-SFDR ADCs, VCOs, and low-phase-noise PLLs;
  • High PSRR: 70 dB @ 120 Hz, 50 dB @ 1 MHz, 30 dB @ 10 MHz, with excellent line/load regulation (< 0.1%);
  • Stable with tiny ceramic capacitors: Only 1 µF minimum output capacitance required (X5R/X7R), eliminating bulky, unreliable tantalum or electrolytic caps;
  • No external components needed — unlike many LDOs, it requires no bias capacitor or feedforward cap, simplifying design and reducing BOM.
It operates from an input range of 1.8 V to 20 V, making it ideal for single-cell Li-ion (2.7–4.2 V), multi-cell alkaline (3–9 V), or industrial 12 V rails — and delivers a precise 3.3 V ±1.5% output, with dropout as low as 300 mV @ 100 mA.

Introduction

The LT1761IS5-SD#TRMPBF delivers exceptional analog performance and energy efficiency in a microscopic SOT-23-5 footprint:
🔹 Micropower leadership: 20 µA IQ — among the lowest for a 100 mA LDO — enabling decades-long operation from primary batteries in remote sensors and wearables;
🔹 Precision low-noise regulation: 20 µVRMS noise and 70 dB PSRR at line frequency suppress switching artifacts and ripple, preserving SNR in 16+ bit data converters and RF synthesizers;
🔹 Robust, simple integration: Stable with 1 µF ceramic output cap, no external compensation, reverse-battery and reverse-current protection — zero external parts beyond decoupling caps;
🔹 True rail-to-rail enable control: EN pin accepts logic levels down to 0.4 V (for 1.8 V systems) and up to 20 V (no level shifter needed);
🔹 Fail-safe behavior: Internal thermal shutdown, current limiting, and undervoltage lockout (UVLO) ensure safe operation under fault conditions.
Its SOT-23-5 (IS5) package (2.9 mm × 1.6 mm) is widely supported by automated assembly lines and offers good thermal performance (θJA ≈ 200°C/W) — supporting full 100 mA load at +50°C ambient with minimal copper area.

Key Features

✅ Micropower Operation & Low Dropout:
 • Output current: up to 100 mA;
 • Quiescent current: 20 µA (typ.), < 30 µA (max) — drops to < 1 µA in shutdown;
 • Dropout voltage: 300 mV (typ.) @ 100 mA, 500 mV (max);
 • Input voltage range: 1.8 V to 20 V.
✅ Low Noise & High PSRR:
 • Output noise: 20 µVRMS (10 Hz–100 kHz);
 • PSRR: 70 dB @ 120 Hz, 50 dB @ 1 MHz, 30 dB @ 10 MHz;
 • Line regulation: 0.01%/V, Load regulation: 0.05% (0–100 mA).
✅ Fast Transient Response & Stability:
 • Load transient recovery: < 10 µs to ±1% for 50 mA step (with 4.7 µF ceramic output cap);
 • Stable with ≥ 1 µF ceramic output capacitors — no ESR requirement;
 • No external compensation needed.
✅ Robust Protection & Control:
 • Reverse-battery protection: survives –20 V on IN;
 • Reverse-current protection: prevents backfeed from output to input;
 • Thermal shutdown with hysteresis;
 • Enable pin (active-high): logic-compatible from 0.4 V to 20 V.
✅ Fixed 3.3 V Output & SOT-23-5 (IS5) Package:
 • Output voltage: 3.3 V (±1.5% over line/load/temp);
 • Package: 5-Lead SOT-23 (2.9 mm × 1.6 mm) (IS5) — smallest 100 mA LDO in its class;
 • RoHS-compliant, Pb-free, and qualified for –40°C to +125°C junction temperature.

Typical Specification Table

Parameter Specification
Manufacturer Analog Devices Inc. (ADI) — formerly Linear Tech
Product Series LT1761 Family (Micropower, Low-Noise LDOs)
Model LT1761IS5-SD#TRMPBF
Function Fixed-Output Low-Dropout Linear Regulator
Output Voltage 3.3 V (fixed), ±1.5% over line/load/temp
Max Output Current 100 mA
Input Voltage Range 1.8 V to 20 V
Dropout Voltage (100 mA) 300 mV (typ.), 500 mV (max)
Output Noise (10 Hz–100 kHz) 20 µVRMS
PSRR @ 1 MHz 50 dB
Load Transient Recovery < 10 µs (±1%, 50 mA step, 4.7 µF out)
Min Output Capacitance 1 µF ceramic (X5R/X7R)
Enable Threshold 0.4 V (min), 20 V (max) — rail-to-rail compatible
Operating Junction Temp. –40°C to +125°C
Package 5-Lead SOT-23 (2.9 mm × 1.6 mm) (IS5)
RoHS / Green Yes (Pb-free, Halogen-free)
Packaging Tape-and-Reel, 500 units (#TRMPBF)

Typical Applications

🔹 Long-Life Battery-Powered Sensors: Wireless environmental monitors (temp/humidity/pressure), smart agriculture nodes, and asset trackers — where 20 µA IQ extends CR2032 or AA battery life to years, not months.
🔹 Precision Analog & RF Power: Supplying low-noise op-amps (e.g., LT1028), reference buffers (e.g., ADR4533), VCOs (e.g., HMC513), and RF transceivers (e.g., nRF52840) — leveraging 20 µVRMS noise and 70 dB PSRR to preserve phase noise and SFDR.
🔹 Medical Wearables & Implantables: ECG/PPG front-ends, glucose meters, and hearing aids — benefiting from ultra-low power, small size, and high reliability.
🔹 Industrial IoT Edge Nodes: Distributed vibration sensors, predictive maintenance modules, and wireless valve controllers — using wide VIN (1.8–20 V) to support diverse battery and field bus supplies.
🔹 Portable Test Equipment: Handheld multimeters, oscilloscope probes, and signal generators — enabled by low noise, fast transient response, and robust protection.
🔹 Automotive Cabin Electronics: Tire pressure monitoring systems (TPMS), seat occupancy sensors, and infotainment micro-sensors — meeting AEC-Q200 stress requirements (qualified per ADI’s automotive reliability program).

Development & Design Notes

🔧 PCB Layout Best Practices:
  • Place input and output ceramic capacitors within 3 mm of their respective pins, using short, wide traces — minimizes inductance and preserves high-frequency PSRR.
  • Use separate ground vias for IN, OUT, and GND pins — avoid daisy-chaining grounds to prevent noise coupling.
  • Keep EN trace short and away from noisy digital signals — add a 10 nF capacitor from EN to GND if routing near clocks or RF.
🔧 Capacitor Selection & Decoupling:
  • Use low-ESR, X5R or X7R ceramic capacitors:
     ✓ Input: 1 µF + 100 nF in parallel (0805 or 0603);
     ✓ Output: 4.7 µF (recommended for best transient response) — still well within 1 µF minimum spec;
     ✓ Optional: Add 10 nF in parallel with output cap for >10 MHz bypassing.
  • Avoid high-ESR types (tantalum, aluminum) — they degrade PSRR and transient response.
🔧 Enable & Sequencing Integration:
  • Tie EN directly to MCU GPIO — no level shifter needed (0.4 V–20 V compatible).
  • For battery-powered systems, use EN to implement deep-sleep wake-up: assert EN only during active measurement windows — reduces average IQ to < 1 µA.
  • Combine with supervisor IC (e.g., LTC2906) for power-on reset sequencing (e.g., delay 3.3 V rail until 5 V is stable).
🔧 Thermal Management & Reliability:
  • SOT-23-5 has modest thermal capability (θJA ≈ 200°C/W). For continuous 100 mA operation above +40°C ambient, add ≥ 50 mm² copper pour under the IC.
  • FIT rate = 24 failures per billion hours, with FMEDA report supporting IEC 61508 SIL-2 — combine thermal monitoring (via external NTC) with watchdog-timed readback of output voltage for functional safety.
🔧 Calibration & Accuracy Optimization:
  • Output voltage accuracy is ±1.5% over all conditions — sufficient for most digital logic and analog peripherals. For tighter tolerance, use external feedback resistors with the adjustable version (LT1761IS5-ADJ).
  • For best noise performance, avoid sharing the LDO’s ground plane with high-current digital sections — use star grounding or split planes tied at one point.
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